MT46V32M16BN-6

Effective Inventory7,140

DDR DRAM, 32MX16, 0.7ns, CMOS, PBGA60, 10 X 12.50 MM, LEAD FREE, PLASTIC, FBGA-60

  • Manufacturer Part # : MT46V32M16BN-6

  • Package/Case: FBGA

  • Brand: MICRON

  • Product Categories : Memory

Quality Assurance

Quality Assurance

All parts procured from our supply chain network undergo a rigorous incoming inspection process. This meticulous inspection ensures that the parts received by our customers are authentic and meet the required standards. Additionally, we maintain detailed records of these inspections to ensure transparency and traceability throughout the supply chain.

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Certification

We have successfully obtained various certification standards and have established our own professional testing laboratory. This ensures that every product we supply to our customers meets the highest quality standards. We adhere to strict testing protocols to maintain the consistency and accuracy of our products. To ensure that our products are original and genuine, we also collaborate with reputable third-party testing facilities to conduct rigorous quality testing. Our commitment to quality extends to meeting industry, legal, regulatory, and ISO 9001:2015 requirements.

Shipping & Payment

Shipping & Payment

About Shipping

We generally ship orders within a few business days through reliable shipping carriers such as FedEx, SF, UPS, or DHL. We also have support for other shipping methods. If you would like to inquire about specific shipping details or costs, please don't hesitate to reach out to us.

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About Payment

We accept various payment methods, including VISA, MasterCard, UnionPay, Western Union, PayPal, and other channels.

If you have a specific payment method in mind or would like to inquire about rates and other details, please feel free to contact us.

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Service & Packaging

Service & Packaging

About After Sales Service

All Parts Extended Quality Guarantee

Initiate the application within 90 days from the shipment date.

Confirm the return or exchange with our staff.

Maintain the goods in their original condition as received.

Lastly, please note that the eligibility for return or exchange of goods is subject to an assessment of the actual condition of the returned items. We will evaluate the received goods before finalizing the return or exchange process. If you have any inquiries or require further assistance regarding returns or exchanges, please don't hesitate to contact us at [email protected]

About packaging

Regarding packaging, our products are carefully packed in anti-static bags to provide ESD anti-static protection. The outer packaging is durable with secure closure. We support various packaging methods such as Tape and Reel, Cut Tape, Tube, or Tray.

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MT46V32M16BN-6 DataSheet

no-price

Current price plan is under preparation. Please contact our customer service team for the latest pricing information. Thank you for your understanding and support!

Rapid Quote

Please submit RFQ for MT46V32M16BN-6 or email to us: Email: [email protected], we will contact you in 12 hours.

Details

Functional DescriptionThe DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR SDRAM effectively consists of a single 2n-bit-wide, one-clockcycle data transfer at the internal DRAM core and two corresponding n-bit-wide, onehalf-clock-cycle data transfers at the I/O pins.Features• VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V• VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)• Bidirectional data strobe (DQS) transmitted/ received with data, i.e., source-synchronous data capture (x16 has two – one per byte)• Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle• Differential clock inputs (CK and CK#)• Commands entered on each positive CK edge• DQS edge-aligned with data for READs; centeraligned with data for WRITEs• DLL to align DQ and DQS transitions with CK• Four internal banks for concurrent operation• Data mask (DM) for masking write data (x16 has two – one per byte)• Programmable burst lengths: 2, 4, or 8• Auto refresh – 64ms, 8192-cycle(Commercial and industrial) – 16ms, 8192-cycle (Automotive)• Self refresh (not available on AT devices)• Longer-lead TSOP for improved reliability (OCPL)• 2.5V I/O (SSTL_2 compatible)• Concurrent auto precharge option is supported• tRAS lockout supported (tRAP = tRCD)

Key Features

  • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V
  • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
  • Bidirectional data strobe (DQS) transmitted/
  • received with data, i.e., source-synchronous data
  • capture (x16 has two – one per byte)
  • Internal, pipelined double-data-rate (DDR)
  • architecture; two data accesses per clock cycle
  • Differential clock inputs (CK and CK#)
  • Commands entered on each positive CK edge
  • DQS edge-aligned with data for READs; centeraligned with data for WRITEs
  • DLL to align DQ and DQS transitions with CK
  • Four internal banks for concurrent operation
  • Data mask (DM) for masking write data
  • (x16 has two – one per byte)
  • Programmable burst lengths: 2, 4, or 8
  • Auto refresh
  • – 64ms, 8192-cycle(Commercial and industrial)
  • – 16ms, 8192-cycle (Automotive)
  • Self refresh (not available on AT devices)
  • Longer-lead TSOP for improved reliability (OCPL)
  • 2.5V I/O (SSTL_2 compatible)
  • Concurrent auto precharge option is supported
  • tRAS lockout supported (tRAP = tRCD)
MICRON Inventory

Specifications

The followings are basic parameters of the part selected concerning the characteristics of the part and categories it belongs to.

Pbfree Code Yes Rohs Code Yes
Part Life Cycle Code Obsolete Part Package Code BGA
Pin Count ! 60 Reach Compliance Code compliant
ECCN Code EAR99 HTS Code ! 8542.32.00.28
Access Mode ! FOUR BANK PAGE BURST Access Time-Max 0.7 ns
Additional Feature ! AUTO/SELF REFRESH Clock Frequency-Max (fCLK) 167 MHz
I/O Type COMMON Interleaved Burst Length 2,4,8
JESD-30 Code R-PBGA-B60 JESD-609 Code e1
Length 12.5 mm Memory Density 536870912 bit
Memory IC Type DDR1 DRAM Memory Width 16
Number of Functions 1 Number of Ports ! 1
Number of Terminals 60 Number of Words 33554432 words
Number of Words Code 32000000 Operating Mode ! SYNCHRONOUS
Operating Temperature-Max 70 °C Operating Temperature-Min
Organization 32MX16 Output Characteristics 3-STATE
Package Body Material PLASTIC/EPOXY Package Code TBGA
Package Equivalence Code BGA60,9X12,40/32 Package Shape RECTANGULAR
Package Style GRID ARRAY, THIN PROFILE Peak Reflow Temperature (Cel) 260
Power Supplies ! 2.5 V Qualification Status ! Not Qualified
Refresh Cycles 8192 Seated Height-Max 1.2 mm
Self Refresh YES Sequential Burst Length 2,4,8
Standby Current-Max 0.005 A Supply Voltage-Max (Vsup) 2.7 V
Supply Voltage-Min (Vsup) 2.3 V Supply Voltage-Nom (Vsup) 2.5 V
Surface Mount ! YES Technology CMOS
Temperature Grade ! COMMERCIAL Terminal Finish TIN SILVER COPPER
Terminal Form ! BALL Terminal Pitch ! 1 mm
Terminal Position BOTTOM Width 10 mm

Datasheet PDF

Datasheets record the features, absolute maximum ratings, applications and more of the device, which benefit a lot as an overall guide to the specific application of the part.

Preliminary Specification MT46V32M16BN-6 PDF Download

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